1. Field
This disclosure relates generally to redistributed chip panels, and more specifically, to a method for controlling warpage during a manufacture of redistributed chip packaging panels.
2. Related Art
Semiconductor and other types of electronic devices are often encapsulated wholly or partly in plastic resin to provide environmental protection and facilitate external connection to the devices. For convenience of explanation and not intended to be limiting, the present invention is described for semiconductor devices, but persons of skill in the art will understand that the present invention applies to any type of electronic device that is substantially in chip form. Accordingly, such other types of devices including the non-limiting examples given below, are intended to be included in the terms “device”, “electronic device”, “semiconductor device” and “integrated circuit” whether singular or plural, and the terms “device”, “die” and “chip” are intended to be substantially equivalent. Non-limiting examples of suitable devices are semiconductor integrated circuits, individual semiconductor devices, piezoelectric devices, magnetostrictive devices, solid state filters, magnetic tunneling structures, integrated passive devices such as capacitors, resistors and inductors, and combinations and arrays of any and all of these types of devices and elements. Further, the present invention does not depend upon the types of die or chips being used nor the materials of which they are constructed provided that such materials withstand the encapsulation process.
In certain types of electronic device packaging where connections to multiple devices included in the package are made after encapsulation, there is a problem referred to as warping that can occur during encapsulation. Warping is of particular concern in electronic assemblies that are in the form of a comparatively flat or planar panel whose device electrical connections are exposed on a principal surface. It is often desired to form an integrated electronic assembly by interconnecting the various devices in the panel using planar processing technology. If the panel has warped during encapsulation, the process of adding interconnects becomes difficult, which can affect overall yield and cost. Thus, control or elimination of warping is important to achieving high manufacturing yields and low manufacturing costs in such encapsulated planar assemblies.
In addition, warpage of a redistributed chip panel (RCP) causes handling problems during the manufacture thereof. In particular, warpage of an RCP panel causes handling problems in build-up tools, during solder print/solder ball attach and during saw of finished packages from a completed panel. During the process of layer build-up and solder print the panel is supported by a ceramic carrier, however, the ceramic carrier is a reuseable component and thus needs to be removed prior to the saw operation. Ideally, a flat panel is needed for build-up, solder ball print, and saw of the unsupported completed panel into final packages. While an embedded ground plane (EGP) that is presently used in RCP panels produces a fixed warpage, the EGP cannot be manipulated. In other words, the use of an EGP or embedded framework that is flat with the surface of the die of an RCP panel produces a fixed amount of warpage that cannot be manipulated.
Accordingly, there is a need for an improved method and apparatus for overcoming the problems in the art as discussed above.